POWER INTEGRITY ANALYSIS AND MANAGEMENT FOR INTEGRATED CIRCUITS

　　New Techniques and Tools for Ensuring On-Chip Power Integrity—Down to Nanoscale

　　As chips continue to scale, power integrity issues are introducing unexpected project complexity and cost. In this book, two leading industry innovators thoroughly discuss the power integrity challenges that engineers face in designing at nanoscale levels, introduce new analysis and management techniques for addressing these issues, and provide breakthrough tools for hands-on problem solving.

Preface
Acknowledgments
About the Authors
Contributors
Ch1: Power, Delivering Power, and Power Integrity
Ch2: Ultra-Large-Scale Integration and Power Challenges
Ch3: IC Power Integrity and Optimal Power Delivery
Ch4: Early Power Integrity Analysis and Abstraction
Ch5: Power Integrity Analysis and EMI/EMC
Ch6: Power Distribution Modeling and Integrity Analysis
Ch7: Effective Current Density and Continuum Models
Ch 8: Power Integrity-Aware Chip Floorplanning and Design
Ch 9: Power Integrity Management in Integrated Circuits and Systems
Ch10: Integration Technologies, Trends, and Challenges
Appendix A: ECD Continuum Model Derivation
Appendix B: Derivation of the Helmholtz Equation for Planar Circuits
Index