POWER INTEGRITY ANALYSIS AND MANAGEMENT FOR INTEGRATED CIRCUITS

Preface xv
Acknowledgments xxi
About the Authors xxiii
Contributors xxv

Chapter 1: Power, Delivering Power, and Power Integrity 1
1.1 Electromotive Force (emf) 1
1.2 Electrical Power 5
1.3 Power Delivery 8
1.4 Power Integrity (PI) 13
1.5 Exercises 17
References 18

Chapter 2: Ultra-Large-Scale Integration and Power Challenges 19
2.1 Exponential Integration and Semiconductor Scaling 20
2.2 Power and Energy Consumption 27
2.3 Power, Heat, and Power Integrity Challenges 39
2.4 Exercises 50
References 51

Chapter 3: IC Power Integrity and Optimal Power Delivery 53
3.1 Power Transfer and Efficiency 53
3.2 Optimal IC Power Delivery: On-Chip Inductance and Grid Design 81
3.3 Power Grid Cost Factor Trade-off Analysis and Design 99
3.4 Exercises 106
References 107

Chapter 4: Early Power Integrity Analysis and Abstraction 111
4.1 Process, Voltage, and Temperature: Design Verification Space 112
4.2 Back-End and Front-End PI Analysis 115
4.3 Simulation Environment for Models of High Abstraction Levels 126
4.4 Abstraction and PI Analysis Examples 129
4.5 Summary and Enhancements 135
4.6 Exercises 136
References 138

Chapter 5: Power Integrity Analysis and EMI/EMC 141
5.1 Introduction 141
5.2 Analysis of Noise Generation and Propagation through a Power Distribution Network 143
5.3 Modeling Decoupling Capacitors for Noise Mitigation in PDNs 150
5.4 Current Design Methodology for Power Delivery Networks 154
5.5 Modeling Methodologies 159
5.6 Numerical Methods 169
5.7 Power and Signal Delivery Analysis Tools and Limitations 176
5.8 Power Integrity-Aware Electromagnetic Interference Analysis 188
5.9 Strengths and Limitations of Existing Early EMI methodologies 197
5.10 Early Power Integrity-Aware EMI Modeling and Analysis Flow 198
5.11 SI, PI, and EMI Summary 215
5.12 Exercises 216
References 216

Chapter 6: Power Distribution Modeling and Integrity Analysis 221
6.1 Introduction 221
6.2 Modeling of a Power Distribution Grid 224
6.3 Numerical Analysis of Power Distribution Model 229
6.4 Differential and Common-Mode Noise 230
6.5 Verification and Error Analysis 233
6.6 Modeling of On-Chip Bus Switching Current 239
6.7 Verification of the Bus Model 245
6.8 Bus Skewing to Reduce Power Distribution Noise 248
6.9 Case Study: Reduction of Power Distribution Noise 250
6.10 Exercises 252
6.11 Appendix: Coefficients for Equation (6-37) 253
References 255

Chapter 7: Effective Current Density and Continuum Models 259
7.1 Circuit and Model Simplification 259
7.2 Definition of Effective Current Density 260
7.3 Effective Current Density and Virtual Currents 263
7.4 Symmetry in Networks Containing Conductors, Insulators, and Other Components 263
7.5 A Continuum Model Using ECD 264
7.6 Practical Application of a Continuum-Based Simulator to IC Floorplanning 273
7.7 Continuum Models Compared to SPICE Models 280
7.8 Model Enhancement for Nanoscale CMOS Integrated Circuits 284
7.9 Exercises 285
References 286

Chapter 8: Power Integrity-Aware Chip Floorplanning and Design 287
8.1 Design for Power Integrity: Nanometer Era Considerations 287
8.2 Design for Power Integrity: Techniques 291
8.3 Power Management and Power Integrity 300
References 314

Chapter 9: Power Integrity Management in Integrated Circuits and Systems 317
9.1 Chip-Level PI Management 318
9.2 System- and Package-Level PI Management 331
9.3 Exercises 341
References 343
Additional Reading 346

Chapter 10: Integration Technologies, Trends, and Challenges 347
10.1 Chip-Level Integration 348
10.2 Package-Level Integration 352
10.3 Integration Trend for Power Integrity Management Components 366
References 367
Additional Reading 369

Appendix A: ECD Continuum Model Derivation 371

Appendix B: Derivation of the Helmholtz Equation for Planar Circuits 383

Index 385

Preface xv
Acknowledgments xxi
About the Authors xxiii
Contributors xxv

Chapter 1: Power, Delivering Power, and Power Integrity 1
1.1 Electromotive Force (emf) 1
1.2 Electrical Power 5
1.3 Power Delivery 8
1.4 Power Integrity (PI) 13
1.5 Exercises 17
References 18

Chapter 2: Ultra-Large-Scale Integration and Power Challenges 19
2.1 Exponential Integration and Semiconductor Scaling 20
2.2 Power and Energy Consumption 2...