VHDL FOR LOGIC SYNTHESIS 3/E

　　Making VHDL a simple and easy-to-use hardware description language
Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the full range of synthesis types.

　　This third edition has been substantially rewritten to include the new VHDL-2008 features that enable synthesis of fixed-point and floating-point hardware. Extensively updated throughout to reflect modern logic synthesis usage, it also contains a complete case study to demonstrate the

Preface.
List of Figures.
List of Tables.

Ch1:Introduction.
Ch2:Register-Transfer Level Design.
Ch3:Combinational Logic.
Ch4:Basic Types.
Ch5:Operators.
Ch6:Synthesis Types.
Ch7:Std_Logic_Arith.
Ch8:Sequential VHDL.
Ch9:Registers.
Ch10:Hierarchy.
Ch11:Subprograms.
Ch12:Special Structures.
Ch13:Test Benches.
Ch14:Libraries.
Ch15:Case Study.

A Package Listings.
B Syntax Reference.
References.
Index.